ESP32_RTOS_SDK V1.1.0

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gpio.h
1 /*
2 * ESPRSSIF MIT License
3 *
4 * Copyright (c) 2015 <ESPRESSIF SYSTEMS (SHANGHAI) PTE LTD>
5 *
6 * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP32 only, in which case,
7 * it is free of charge, to any person obtaining a copy of this software and associated
8 * documentation files (the "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the Software is furnished
11 * to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all copies or
14 * substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
18 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
19 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
20 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 */
24
25 #ifndef __GPIO_H__
26 #define __GPIO_H__
27
28 #ifdef __cplusplus
29 extern "C" {
30 #endif
31
32 #define GPIO_Pin_0 (BIT(0)) /* Pin 0 selected */
33 #define GPIO_Pin_1 (BIT(1)) /* Pin 1 selected */
34 #define GPIO_Pin_2 (BIT(2)) /* Pin 2 selected */
35 #define GPIO_Pin_3 (BIT(3)) /* Pin 3 selected */
36 #define GPIO_Pin_4 (BIT(4)) /* Pin 4 selected */
37 #define GPIO_Pin_5 (BIT(5)) /* Pin 5 selected */
38 #define GPIO_Pin_6 (BIT(6)) /* Pin 6 selected */
39 #define GPIO_Pin_7 (BIT(7)) /* Pin 7 selected */
40 #define GPIO_Pin_8 (BIT(8)) /* Pin 8 selected */
41 #define GPIO_Pin_9 (BIT(9)) /* Pin 9 selected */
42 #define GPIO_Pin_10 (BIT(10)) /* Pin 10 selected */
43 #define GPIO_Pin_11 (BIT(11)) /* Pin 11 selected */
44 #define GPIO_Pin_12 (BIT(12)) /* Pin 12 selected */
45 #define GPIO_Pin_13 (BIT(13)) /* Pin 13 selected */
46 #define GPIO_Pin_14 (BIT(14)) /* Pin 14 selected */
47 #define GPIO_Pin_15 (BIT(15)) /* Pin 15 selected */
48 #define GPIO_Pin_16 (BIT(16)) /* Pin 16 selected */
49 #define GPIO_Pin_17 (BIT(17)) /* Pin 17 selected */
50 #define GPIO_Pin_18 (BIT(18)) /* Pin 18 selected */
51 #define GPIO_Pin_19 (BIT(19)) /* Pin 19 selected */
52 #define GPIO_Pin_20 (BIT(20)) /* Pin 20 selected */
53 #define GPIO_Pin_21 (BIT(21)) /* Pin 21 selected */
54 #define GPIO_Pin_22 (BIT(22)) /* Pin 22 selected */
55 #define GPIO_Pin_23 (BIT(23)) /* Pin 23 selected */
56 //#define GPIO_Pin_24 (BIT(24)) /* Pin 24 selected */
57 #define GPIO_Pin_25 (BIT(25)) /* Pin 25 selected */
58 #define GPIO_Pin_26 (BIT(26)) /* Pin 26 selected */
59 #define GPIO_Pin_27 (BIT(27)) /* Pin 27 selected */
60 //#define GPIO_Pin_28 (BIT(28)) /* Pin 28 selected */
61 //#define GPIO_Pin_29 (BIT(29)) /* Pin 29 selected */
62 //#define GPIO_Pin_30 (BIT(30)) /* Pin 30 selected */
63 //#define GPIO_Pin_31 (BIT(31)) /* Pin 31 selected */
64 #define GPIO_Pin_32 (BIT(0)) /* Pin 32 selected */
65 #define GPIO_Pin_33 (BIT(1)) /* Pin 33 selected */
66 #define GPIO_Pin_34 (BIT(2)) /* Pin 34 selected */
67 #define GPIO_Pin_35 (BIT(3)) /* Pin 35 selected */
68 #define GPIO_Pin_36 (BIT(4)) /* Pin 36 selected */
69 #define GPIO_Pin_37 (BIT(5)) /* Pin 37 selected */
70 #define GPIO_Pin_38 (BIT(6)) /* Pin 38 selected */
71 #define GPIO_Pin_39 (BIT(7)) /* Pin 39 selected */
72
73 #define GPIO_PIN_REG_0 PERIPHS_IO_MUX_GPIO0_U
74 #define GPIO_PIN_REG_1 PERIPHS_IO_MUX_U0TXD_U
75 #define GPIO_PIN_REG_2 PERIPHS_IO_MUX_GPIO2_U
76 #define GPIO_PIN_REG_3 PERIPHS_IO_MUX_U0RXD_U
77 #define GPIO_PIN_REG_4 PERIPHS_IO_MUX_GPIO4_U
78 #define GPIO_PIN_REG_5 PERIPHS_IO_MUX_GPIO5_U
79 #define GPIO_PIN_REG_6 PERIPHS_IO_MUX_SD_CLK_U
80 #define GPIO_PIN_REG_7 PERIPHS_IO_MUX_SD_DATA0_U
81 #define GPIO_PIN_REG_8 PERIPHS_IO_MUX_SD_DATA1_U
82 #define GPIO_PIN_REG_9 PERIPHS_IO_MUX_SD_DATA2_U
83 #define GPIO_PIN_REG_10 PERIPHS_IO_MUX_SD_DATA3_U
84 #define GPIO_PIN_REG_11 PERIPHS_IO_MUX_SD_CMD_U
85 #define GPIO_PIN_REG_12 PERIPHS_IO_MUX_MTDI_U
86 #define GPIO_PIN_REG_13 PERIPHS_IO_MUX_MTCK_U
87 #define GPIO_PIN_REG_14 PERIPHS_IO_MUX_MTMS_U
88 #define GPIO_PIN_REG_15 PERIPHS_IO_MUX_MTDO_U
89 #define GPIO_PIN_REG_16 PERIPHS_IO_MUX_GPIO16_U
90 #define GPIO_PIN_REG_17 PERIPHS_IO_MUX_GPIO17_U
91 #define GPIO_PIN_REG_18 PERIPHS_IO_MUX_GPIO18_U
92 #define GPIO_PIN_REG_19 PERIPHS_IO_MUX_GPIO19_U
93 #define GPIO_PIN_REG_20 PERIPHS_IO_MUX_GPIO20_U
94 #define GPIO_PIN_REG_21 PERIPHS_IO_MUX_GPIO21_U
95 #define GPIO_PIN_REG_22 PERIPHS_IO_MUX_GPIO22_U
96 #define GPIO_PIN_REG_23 PERIPHS_IO_MUX_GPIO23_U
97 #define GPIO_PIN_REG_25 PERIPHS_IO_MUX_GPIO25_U
98 #define GPIO_PIN_REG_26 PERIPHS_IO_MUX_GPIO26_U
99 #define GPIO_PIN_REG_27 PERIPHS_IO_MUX_GPIO27_U
100 #define GPIO_PIN_REG_32 PERIPHS_IO_MUX_GPIO32_U
101 #define GPIO_PIN_REG_33 PERIPHS_IO_MUX_GPIO33_U
102 #define GPIO_PIN_REG_34 PERIPHS_IO_MUX_GPIO34_U
103 #define GPIO_PIN_REG_35 PERIPHS_IO_MUX_GPIO35_U
104 #define GPIO_PIN_REG_36 PERIPHS_IO_MUX_GPIO36_U
105 #define GPIO_PIN_REG_37 PERIPHS_IO_MUX_GPIO37_U
106 #define GPIO_PIN_REG_38 PERIPHS_IO_MUX_GPIO38_U
107 #define GPIO_PIN_REG_39 PERIPHS_IO_MUX_GPIO39_U
108
109 #define GPIO_REG_READ(reg) READ_PERI_REG(reg)
110 #define GPIO_REG_WRITE(reg, val) WRITE_PERI_REG(reg, val)
111 #define GPIO_PIN_COUNT 40
112 #define GPIO_ID_PIN0 0
113 #define GPIO_ID_PIN(n) (GPIO_ID_PIN0 + (n))
114 #define GPIO_PIN_ADDR(i) (GPIO_PIN0 + i * 4)
115
116 #define GPIO_ID_IS_PIN_REGISTER(reg_id) \
117 ((reg_id >= GPIO_ID_PIN0) && (reg_id <= GPIO_ID_PIN(GPIO_PIN_COUNT - 1)))
118
119 #define GPIO_REGID_TO_PINIDX(reg_id) ((reg_id) - GPIO_ID_PIN0)
120
121 typedef enum {
122 GPIO_PIN_INTR_DISABLE = 0,
123 GPIO_PIN_INTR_POSEDGE = 1,
124 GPIO_PIN_INTR_NEGEDGE = 2,
125 GPIO_PIN_INTR_ANYEDGE = 3,
126 } GPIO_INT_TYPE;
127
128 typedef enum {
129 GPIO_Mode_Input = 0x0,
130 GPIO_Mode_Out_OD,
131 GPIO_Mode_Output ,
132 GPIO_Mode_Sigma_Delta ,
133 } GPIOMode_TypeDef;
134
135 typedef enum {
136 GPIO_PullUp_DIS = 0x0,
137 GPIO_PullUp_EN = 0x1,
138 } GPIO_Pullup_IF;
139
140 typedef enum {
141 GPIO_PullDown_DIS = 0x0,
142 GPIO_PullDown_EN = 0x1,
143 } GPIO_Pulldown_IF;
144
145 typedef struct {
146 uint32 GPIO_Pin;
147 uint32 GPIO_Pin_high;
148 GPIOMode_TypeDef GPIO_Mode;
149 GPIO_Pullup_IF GPIO_Pullup;
150 GPIO_Pulldown_IF GPIO_Pulldown;
151 GPIO_INT_TYPE GPIO_IntrType;
152 } GPIO_ConfigTypeDef;
153
178 #define GPIO_OUTPUT_SET(gpio_no, bit_value) \
179 ((gpio_no < 32) ? gpio_output_conf(bit_value << gpio_no, (bit_value ? 0 : 1) << gpio_no, 1 << gpio_no, 0) : \
180 gpio_output_conf_high(bit_value << (gpio_no - 32), (bit_value ? 0 : 1) << (gpio_no - 32), 1 << (gpio_no - 32),0))
181
190 #define GPIO_OUTPUT(gpio_bits, bit_value) \
191 if(bit_value) gpio_output_conf(gpio_bits, 0, gpio_bits, 0);\
192 else gpio_output_conf(0, gpio_bits, gpio_bits, 0)
193
202 #define GPIO_OUTPUT_HIGH(gpio_bits, bit_value) \
203 if(bit_value) gpio_output_conf_high(gpio_bits, 0, gpio_bits, 0);\
204 else gpio_output_conf_high(0, gpio_bits, gpio_bits, 0)
205
213 #define GPIO_DIS_OUTPUT(gpio_no) ((gpio_no < 32) ? \
214 gpio_output_conf(0, 0, 0, 1 << gpio_no) : gpio_output_conf_high(0, 0, 0, 1 << gpio_no))
215
223 #define GPIO_AS_INPUT(gpio_bits) gpio_output_conf(0, 0, 0, gpio_bits)
224
232 #define GPIO_AS_INPUT_HIGH(gpio_bits) gpio_output_conf_high(0, 0, 0, gpio_bits)
233
241 #define GPIO_AS_OUTPUT(gpio_bits) gpio_output_conf(0, 0, gpio_bits, 0)
242
250 #define GPIO_AS_OUTPUT_HIGH(gpio_bits) gpio_output_conf_high(0, 0, gpio_bits, 0)
251
259 void gpio_config(GPIO_ConfigTypeDef *pGPIOConfig);
260
268 #define GPIO_INPUT_GET(gpio_no) ((gpio_no < 32) ? \
269 ((gpio_input_get() >> gpio_no) & BIT0) : ((gpio_input_get_high() >> (gpio_no - 32)) & BIT0))
270
285 void gpio_output_conf(uint32 set_mask, uint32 clear_mask, uint32 enable_mask, uint32 disable_mask);
286
301 void gpio_output_conf_high(uint32 set_mask, uint32 clear_mask, uint32 enable_mask, uint32 disable_mask);
302
311 void gpio_intr_handler_register(void *fn, void *arg);
312
321 void gpio_pin_wakeup_enable(uint32 i, GPIO_INT_TYPE intr_state);
322
330 void gpio_pin_wakeup_disable(void);
331
340 void gpio_pin_intr_state_set(uint32 i, GPIO_INT_TYPE intr_state);
341
349 uint32 gpio_input_get(void);
350
358 uint32 gpio_input_get_high(void);
359
369 void gpio_output_sigmadelta_enable(uint32 gpio_num, uint32 sigma_num, uint32 prescale);
370
378 void gpio_output_sigmadelta_disable(void);
379
389 void gpio_intr_config(uint32 gpio_num, uint32 intr_num, GPIO_INT_TYPE intr_type);
390
398 void gpio_intr_process(void);
399
408 void gpio_matrix_in(uint32 gpio, uint32 signal_idx);
409
418 void gpio_matrix_out(uint32 gpio, uint32 signal_idx);
419
428 void intr_matrix_set(uint32 model_num, uint32 intr_num);
429
438 #ifdef __cplusplus
439 }
440 #endif
441
442 #endif
GPIO_ConfigTypeDef::GPIO_Pulldown
GPIO_Pulldown_IF GPIO_Pulldown
Definition: gpio.h:150
gpio_output_conf_high
void gpio_output_conf_high(uint32 set_mask, uint32 clear_mask, uint32 enable_mask, uint32 disable_mask)
Configure GPIO pins out or input.
GPIO_ConfigTypeDef::GPIO_Pin_high
uint32 GPIO_Pin_high
Definition: gpio.h:147
GPIO_ConfigTypeDef::GPIO_IntrType
GPIO_INT_TYPE GPIO_IntrType
Definition: gpio.h:151
gpio_intr_handler_register
void gpio_intr_handler_register(void *fn, void *arg)
Register an application-specific interrupt handler for GPIO pin interrupts.
gpio_pin_intr_state_set
void gpio_pin_intr_state_set(uint32 i, GPIO_INT_TYPE intr_state)
Config interrupt types of GPIO pin.
gpio_intr_config
void gpio_intr_config(uint32 gpio_num, uint32 intr_num, GPIO_INT_TYPE intr_type)
Configure GPIO interrupr.
GPIO_ConfigTypeDef::GPIO_Mode
GPIOMode_TypeDef GPIO_Mode
Definition: gpio.h:148
gpio_matrix_in
void gpio_matrix_in(uint32 gpio, uint32 signal_idx)
To bind GPIO input and a certain road input signal.
gpio_output_sigmadelta_disable
void gpio_output_sigmadelta_disable(void)
Disable GPIO sigmadelta function.
gpio_pin_wakeup_disable
void gpio_pin_wakeup_disable(void)
Disable GPIO wake up to light sleep.
GPIO_ConfigTypeDef::GPIO_Pin
uint32 GPIO_Pin
Definition: gpio.h:146
gpio_output_sigmadelta_enable
void gpio_output_sigmadelta_enable(uint32 gpio_num, uint32 sigma_num, uint32 prescale)
Enable GPIO sigmadelta function.
gpio_input_get_high
uint32 gpio_input_get_high(void)
Sample the value of GPIO input pins and returns a bitmask. This function only get the level GPIO32-GP...
intr_matrix_set
void intr_matrix_set(uint32 model_num, uint32 intr_num)
To bind mode interrupt and interrupt sequence number.
GPIO_ConfigTypeDef::GPIO_Pullup
GPIO_Pullup_IF GPIO_Pullup
Definition: gpio.h:149
gpio_pin_wakeup_enable
void gpio_pin_wakeup_enable(uint32 i, GPIO_INT_TYPE intr_state)
Configure GPIO wake up to light sleep,Only level way is effective.
gpio_intr_process
void gpio_intr_process(void)
The GPIO interrupt function.
gpio_config
void gpio_config(GPIO_ConfigTypeDef *pGPIOConfig)
GPIO init .
gpio_output_conf
void gpio_output_conf(uint32 set_mask, uint32 clear_mask, uint32 enable_mask, uint32 disable_mask)
Configure GPIO pins out or input.
GPIO_ConfigTypeDef
Definition: gpio.h:145
gpio_input_get
uint32 gpio_input_get(void)
Sample the value of GPIO input pins and returns a bitmask. This function only get the level GPIO0-GPI...
gpio_matrix_out
void gpio_matrix_out(uint32 gpio, uint32 signal_idx)
To bind GPIO ouput and a certain road output signal.