发现心仪岗位

岗位职责

作为 NPU 项目的核心设计成员，你将负责人工智能加速器（NPU）核心模块的 RTL 设计、优化与验证工作，推动高性能、低功耗芯片的产品落地。具体包括：

1、参与 NPU 架构评估与微架构定义；

2、完成 NPU 核心计算单元（MAC 阵列、PE 阵列）、控制单元、片上缓存（SRAM/BRAM）、DMA 等模块的 RTL 设计与实现；

3、支持前端综合、形式验证、等效检查和时序收敛；

4、与软件团队协作，支持仿真模型、指令调试和性能分析。

任职要求

1、本科或以上学历，计算机工程、电子工程、微电子工程等相关专业，2 年以上相关经验；

2、熟练掌握 Verilog/SystemVerilog，具备模块级 RTL 设计能力；

3、了解 AI 架构，包括矩阵、向量计算加速、卷积加速、访存调度等；

熟悉常用数字设计流程，如综合（DC）、时序分析、形式验证、仿真（VCS）；

4、良好的调试能力和文档撰写能力。

加分项

有 NPU / DSP / GPU / 图像处理芯片设计经验者优先；

熟悉前沿 AI 模型架构、原理、关键参数；

熟悉 AXI、AHB、NoC、DMA 等 SoC 接口协议；

有 PPA 优化经验，熟悉低功耗设计技术；

具备 Python/TCL 脚本开发能力，自动化设计工具流程者优先。

岗位职责

1、负责 RISCV 芯片的软硬件接口设计，以及 FPGA 原型验证；

2、负责 Linux 内核的移植、裁剪和开发；

3、负责 Linux 内核新模块的驱动开发；

4、负责 Linux 系统的开源 SDK 的维护和升级。

任职要求

1、计算机相关专业本科级以上学历，2 年以上 Linux 系统、驱动或内核开发经验；

2、熟悉 Linux 内核开发，精通一个或以上内核关键模块（如内存管理、进程调度、文件系统、驱动、网络、安全等）；

3、熟悉 Linux 内核常用调优工具，具备内核调优能力；

4、具备良好的团队协作能力，有 Linux kernel 社区开发经验优先，有 Openwrt 开发经验优先；

5、熟悉 PCIe, SPI, USB, MDIO 等总线协议。

The Opportunity

You will be the reason our chip is fast. You will write the hand-tuned kernels that power Large Language Models (LLMs) on our custom RISC-V hardware. You will work directly with hardware architects to exploit our proprietary Matrix (RVM) and Vector (RVV) extensions, squeezing every last FLOP out of the silicon.

Key Responsibilities

·       Kernel Implementation: Write kernels for GEMM and common epilogues (bias/activation/quant); implement Softmax/RMSNorm; evolve toward attention kernels as the project matures.

·       Micro-Optimization: Analyze assembly output. Did the compiler unroll the loop? Did we stall on a memory load? You fix it.

·       Tiling & Layout: Calculate the optimal way to chop a large tensor into "tiles" that fit in our L1 cache/TCM.

·       Benchmarking: Build the "speedometer" for the chip. Prove your kernel is faster than the baseline.

What We Will Teach You

·       Our proprietary RVM (Matrix) and RVV (Vector) intrinsic APIs.

·       How to use our cycle-accurate profilers and hardware counters.

·       The specific memory hierarchy constraints of our AI SoC.

Must-Have Qualifications

·       Strong C/C++ skills, specifically with a math/logic focus.

·       Understanding of Computer Architecture basics: Registers, Cache Hierarchy (L1/L2), SIMD (Single Instruction Multiple Data).

·       Comfortable reading/writing technical documentation (Instruction Set Architecture specs).

Nice-to-Have

·       Experience with CUDA, OpenMP, or AVX/Neon intrinsics.

·       Coursework in Linear Algebra or Numerical Methods.

The Opportunity

You will build the heartbeat of our AI accelerator. While our compilers generate the "what" (the neural network graph), the Runtime determines the "how" (execution). You will write the low-level C/C++ code that manages DMA engines, synchronizes parallel cores, and drives high utilization on our 4-PE AISoC while maintaining correctness and stability.

Key Responsibilities

·       Pipeline Orchestration: Implement the on-device scheduler that coordinates data transfers (DMA) and compute tasks. You will solve classic "producer-consumer" problems in silicon.

·       Memory Management: Build the allocator that manages tight on-chip SRAM (TCM). You decide where every tensor lives and when it dies.

·       Hardware Abstraction (HAL): Implement the low-level HAL and intrinsic wrappers used by our runtime and kernel library (no kernel-mode driver experience required).

·       Consistency & Visibility: Define and enforce explicit memory visibility protocols between cores/TCM/DMA (clean/flush + fence/events) to prevent stale data reads on our non-coherent system.

·       Debug & Profiling: Create the tools that tell us why the chip is stalling (trace markers, cycle counters).

What We Will Teach You

·       Our specific DMA descriptor model and event synchronization hardware.

·       How to manage memory visibility (cache maintenance) on a non-coherent architecture.

·       The internal workings of our on-device scheduling framework.

Must-Have Qualifications

·       Strong proficiency in C/C++ (you understand pointers, memory layout, and the stack vs. heap).

·       Academic or project experience with Operating Systems concepts (mutexes, race conditions, context switching).

·       Fearlessness in debugging: You don't just stare at a segfault; you attach a debugger and find the root cause.

Nice-to-Have

·       Experience with embedded systems (Raspberry Pi, STM32, or bare-metal RISC-V).

·       Knowledge of Python (for building test scripts to drive your C++ runtime).

岗位职责

1、设计和开发公司产品固件的测试方案；

2、能够搭建一套自动化测试系统；

3、开发和优化测试框架；

4、和软件部门紧密协作，持续优化开发和测试流程及相关的系统和自动化工具；

5、开发维护自动化工具进行测试设备运维（CI、Web App 及其他运维工具）。

任职要求

1、本科以上学历，熟练掌握自动化测试及相关工具；

2、熟练使用 C/C++ 和 Python 等编程语言；

3、熟悉通信系统和通信协议；

4、掌握测试流程，熟悉测试管理工具；

5、熟悉嵌入式开发；

6、熟悉 DevOps（熟悉 CI 优先）;

7、熟悉开源硬件，Arduino 和 micropython 等优先;

8、熟悉 ESP32 硬件的优先。