发现心仪岗位

Role Overview

Design compiler technologies that translate AI models into optimized code for the RISC-V AI SoC. You will focus on IR design, code generation, auto tuning, and ensuring clean integration with upstream toolchains (LLVM, MLIR, TVM).

Key Responsibilities

1. Extend MLIR/LLVM to support vector and matrix instruction sets.

2. Implement optimization and lowering passes for AI operators.

3. Build compiler interfaces compatible with ecosystem conventions.

4. Integrate auto tuning and performance modeling.

5. Collaborate with runtime and kernel teams to align code generation strategies.

Qualifications

1. 4+ years in compiler backend or performance optimization.

2. Strong C++/Python proficiency.

3. Familiarity with MLIR, LLVM, TVM, or XLA.

Preferred Attributes

1. Experience integrating custom instructions or intrinsics

2. Knowledge of AI model graph-to-code lowering workflows.

3. Familiarity with autotuning systems like AutoTVM or MLIR-based tuners.

4. Understanding of mixed-precision compute and performance trade-offs.

Impact: You enable portable, high-performance compilation pipelines that power ecosystem integration.

Role Overview

Define and lead the end-to-end software architecture connecting compilers, runtimes, kernels, and frameworks to the RISC-V AI SoC. You will shape not only performance and scalability but also developer experience and ecosystem interoperability, ensuring the SDK feels natural and productive for AI engineers.

Key Responsibilities

1. Design and evolve the SDK and software architecture spanning compiler, runtime, and framework layers.

2. Translate hardware capabilities into consistent, intuitive software abstractions.

3. Champion developer experience, portability, and open-ecosystem compatibility.

4. Collaborate with silicon, compiler, and framework teams to align design across layers.

5. Provide technical leadership and mentorship across software functions.

Qualifications

1. 10+ years in heterogeneous compute software or compiler architecture.

2. Expert in C++/Python, strong system-level design skills.

3. Deep experience with LLVM, MLIR, or TVM; familiarity with RISC-V or GPU ecosystems.

Preferred Attributes

1. Proven ability to architect software stacks bridging hardware and AI frameworks.

2. Experience leading cross-functional software platform teams.

3. Familiarity with open-source AI ecosystems (PyTorch, TensorFlow, ONNX).

4. Strong communication and mentorship capabilities.

岗位职责

1、负责芯片 ISP 算法的开发和优化，包括 3A/降噪/HDR 等关键算法；

2、配合硬件工程师完成 ISP 算法的硬件移植，开发 ISP 调试工具，提高调试效率与准确性；

3、研究 AI ISP  算法，负责 ISP Pipeline 的开发、优化及维护；

4、负责相关算法的产品话落地及后期技术支持；

5、制定图像质量评价指标及测试标准，确保图像处理效果符合产品要求。

任职要求

1、硕士及以上学历，计算机科学、电子工程、图像处理或相关专业；

2、数字图像处理理论基础扎实，三年以上 ISP 算法开发经验；

3、熟悉 Camera ISP 算法全流程，具备 ISP Pipeline 及 3A 算法移植与开发经验，丰富的图像信号处理经验；

4、熟悉 RAW 图分析工具（如 imatest），具备精准评估图像数据质量的能力；

5、具备良好的编程能力，掌握 C/C++ 或者 Matlab；

6、对技术充满热情，具备持续学习的动力，能够适应快速变化的工作环境。