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AI Compiler Engineer社会招聘2026年01月07日
Role Overview
Design compiler technologies that translate AI models into optimized code for the RISC-V AI SoC. You will focus on IR design, code generation, autotuning, and ensuring clean integration with upstream toolchains (LLVM, MLIR, TVM).
Key Responsibilities
1. Extend MLIR/LLVM to support vector and matrix instruction sets.
2. Implement optimization and lowering passes for AI operators.
3. Build compiler interfaces compatible with ecosystem conventions.
4. Integrate autotuning and performance modeling.
5. Collaborate with runtime and kernel teams to align code generation strategies.
Qualifications
1. 4+ years in compiler backend or performance optimization.
2. Strong C++/Python proficiency.
3. Familiarity with MLIR, LLVM, TVM, or XLA.
Preferred Attributes
1. Experience integrating custom instructions or intrinsics
2. Knowledge of AI model graph-to-code lowering workflows.
3. Familiarity with autotuning systems like AutoTVM or MLIR-based tuners.
4. Understanding of mixed-precision compute and performance trade-offs.
Impact: You enable portable, high-performance compilation pipelines that power ecosystem integration.
recruit@espressif.com
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AI Application Engineer社会招聘2026年01月05日
Role Overview
You will develop, optimize, and demonstrate end-to-end AI applications and reference designs on the proprietary RISC-V AI SoC and SDK. This includes benchmarking, demos, and workload enablement to showcase platform capabilities and provide ready-to-use examples for developers and customers.
Key Responsibilities
1. Develop and port AI workloads (CNN, Transformer, multimodal) using PyTorch, TensorFlow, and ONNX on the SDK.
2. Create reference designs combining compiler, runtime, and kernel components.
3. Develop SDK demos, tutorials, and reproducible benchmarking pipelines.
4. Optimize models for performance, accuracy, and power efficiency.
5. Collaborate with compiler, runtime, and framework teams to debug and tune workloads.
6. Deliver performance analysis reports and reference application repositories.
7. Collect usability feedback from internal and external developers.
Qualifications
1. 3–7 years of experience in AI model development, optimization, or deployment.
2. Strong hands-on with PyTorch, TensorFlow, or ONNX Runtime.
3. Experience running AI workloads on GPU, NPU, or heterogeneous compute systems.
4. Strong Python skills; C++ proficiency preferred.
Preferred Attributes
1. Familiarity with quantization, mixed precision, and compiler-based model optimization.
2. Experience creating AI SDK demos, sample apps, or developer documentation.
3. Understanding of CNN, transformer, and attention-based models.
recruit@espressif.com
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AI SDK & Framework Engineer2026 届校园招聘2026年01月21日
The Opportunity
You will make our high-performance AI silicon accessible to the world. While the Runtime team builds the engine, you build the steering wheel. You will develop the Python SDK, integrating our C++ runtime into ecosystems like PyTorch, ONNX, or IREE. You define how data scientists interact with our chip—from "import aisoc" to running real-world LLMs and vision models end-to-end on our device.
Key Responsibilities
· Python/C++ Bridging: Build efficient bindings (using
pybind11) that allow Python users to drive our low-level C++ Runtime and memory allocator with minimal overhead and zero-copy where possible.· Model Ingestion: Build practical model import tools: weight packing/layout transforms, graph partitioning to supported ops, and integration with existing quantization/calibration workflows.
· Developer Experience (DX): Ensure that when a user makes a mistake, they get a helpful Python exception, not a silent segmentation fault.
· Golden Reference Examples: Build and maintain the "Hello World" and "Chatbot" demos that verify the entire hardware/software stack is functioning correctly.
What We Will Teach You
· The internals of modern ML frameworks (how PyTorch dispatch works, how ONNX graphs are structured).
· How to build and ship Python wheels and native extensions for our target runtime environment (Embedded Linux).
· Techniques for zero-copy memory sharing between Python (numpy) and hardware accelerators.
Must-Have Qualifications
· Strong proficiency in Python (you understand decorators, context managers, and the Global Interpreter Lock).
· Working knowledge of C++ (you can read a header file and understand what needs to be exposed to Python).
· Familiarity with ML Data Structures: You know that a "Tensor" is just a pointer to memory with shape and stride metadata.
Nice-to-Have (We Value Projects!)
· Experience with ONNX Runtime, TVM, or MLIR.
· Experience building Python wheels or C-extensions (
pybind11,Cython).campus@espressif.com
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AI Kernel & Performance Engineer2026 届校园招聘2026年01月21日
The Opportunity
You will be the reason our chip is fast. You will write the hand-tuned kernels that power Large Language Models (LLMs) on our custom RISC-V hardware. You will work directly with hardware architects to exploit our proprietary Matrix (RVM) and Vector (RVV) extensions, squeezing every last FLOP out of the silicon.
Key Responsibilities
· Kernel Implementation: Write kernels for GEMM and common epilogues (bias/activation/quant); implement Softmax/RMSNorm; evolve toward attention kernels as the project matures.
· Micro-Optimization: Analyze assembly output. Did the compiler unroll the loop? Did we stall on a memory load? You fix it.
· Tiling & Layout: Calculate the optimal way to chop a large tensor into "tiles" that fit in our L1 cache/TCM.
· Benchmarking: Build the "speedometer" for the chip. Prove your kernel is faster than the baseline.
What We Will Teach You
· Our proprietary RVM (Matrix) and RVV (Vector) intrinsic APIs.
· How to use our cycle-accurate profilers and hardware counters.
· The specific memory hierarchy constraints of our AI SoC.
Must-Have Qualifications
· Strong C/C++ skills, specifically with a math/logic focus.
· Understanding of Computer Architecture basics: Registers, Cache Hierarchy (L1/L2), SIMD (Single Instruction Multiple Data).
· Comfortable reading/writing technical documentation (Instruction Set Architecture specs).
Nice-to-Have
· Experience with CUDA, OpenMP, or AVX/Neon intrinsics.
· Coursework in Linear Algebra or Numerical Methods.
campus@espressif.com
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AI System Software Engineer (Runtime & HAL)2026 届校园招聘2026年01月21日
The Opportunity
You will build the heartbeat of our AI accelerator. While our compilers generate the "what" (the neural network graph), the Runtime determines the "how" (execution). You will write the low-level C/C++ code that manages DMA engines, synchronizes parallel cores, and drives high utilization on our 4-PE AISoC while maintaining correctness and stability.
Key Responsibilities
· Pipeline Orchestration: Implement the on-device scheduler that coordinates data transfers (DMA) and compute tasks. You will solve classic "producer-consumer" problems in silicon.
· Memory Management: Build the allocator that manages tight on-chip SRAM (TCM). You decide where every tensor lives and when it dies.
· Hardware Abstraction (HAL): Implement the low-level HAL and intrinsic wrappers used by our runtime and kernel library (no kernel-mode driver experience required).
· Consistency & Visibility: Define and enforce explicit memory visibility protocols between cores/TCM/DMA (clean/flush + fence/events) to prevent stale data reads on our non-coherent system.
· Debug & Profiling: Create the tools that tell us why the chip is stalling (trace markers, cycle counters).
What We Will Teach You
· Our specific DMA descriptor model and event synchronization hardware.
· How to manage memory visibility (cache maintenance) on a non-coherent architecture.
· The internal workings of our on-device scheduling framework.
Must-Have Qualifications
· Strong proficiency in C/C++ (you understand pointers, memory layout, and the stack vs. heap).
· Academic or project experience with Operating Systems concepts (mutexes, race conditions, context switching).
· Fearlessness in debugging: You don't just stare at a segfault; you attach a debugger and find the root cause.
Nice-to-Have
· Experience with embedded systems (Raspberry Pi, STM32, or bare-metal RISC-V).
· Knowledge of Python (for building test scripts to drive your C++ runtime).
campus@espressif.com
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NOC 设计工程师社会招聘2026年01月05日
岗位职责
1、负责 NoC 系统的方案设计、RTL 实现与集成工作;
2、与验证团队合作,确定验证策略,确保模块的功能实现及性能达标;
3、与中后端团队合作,完成时序收敛;
4、支持驱动开发和问题解决,编写相关技术文档。
职位要求
1、硕士及以上学历,微电子/电子工程/通信工程等相关专业;
2、熟悉计算机体系结构,具有大规模 SoC 芯片设计经验;
3、精通至少一种总线商用 IP(如 FlexNoC、NIC 等);
4、熟悉常见总线协议,如 AMBA、AXI、APB、AHB 等;
5、具有扎实的数字电路基础,精通 Verilog 语言;
6、熟练使用常用 EDA 工具,具备 Python/Tcl/Perl 等自动化脚本语言经验;
8、精通 DMA、外设、低功耗等设计,熟悉时钟复位的设计;
9、具备良好的沟通协调能力与团队合作精神,对新技术充满热情,具备较强的学习动力和自我驱动。
recruit@espressif.com
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模拟 IC 设计工程师(星光计划)星光计划2026年01月21日「星光计划」是乐鑫科技专为全球顶尖本硕博毕业生打造的招聘项目,长期开放且独立于乐鑫校园招聘,是一条通向技术前沿、快速成长的高速通道。岗位职责1、前沿设计:负责创新模拟电路的设计、仿真和验证,涵盖 LDO、Oscillator、IO、ESD、ADC、DAC、PLL、Filter 等高难度电路模块,从概念到实现,推动技术边界;2、高效 Floorplan:主导模拟 Layout 的 Floorplan设计,优化电路布局,提升性能和稳定性,解决复杂的版图挑战;3、技术指导:指导版图工程师进行设计,确保版图与电路设计的一致性和高质量实现;4、跨团队协作:与应用工程师、产品工程师和测试工程师紧密合作,解决技术难题,确保产品顺利从设计阶段过渡到量产;5、技术文档:撰写详细设计文档,记录设计过程和技术决策,推动团队知识共享和技术积累。任职要求1、顶尖高校毕业生,微电子/电子信息/通信工程等相关专业;2、掌握模拟电路基础知识,能够将理论知识应用于实际设计中,挑战技术极限;3、具备一种或多种模拟电路设计经验,如 LDO、Oscillator、IO、ESD、ADC、DAC、PLL、Filter 等,具备实际的设计和优化能力;4、熟悉至少一种编程语言,如 Python、Matlab 或 C,能够进行自动化设计和数据分析;5、具备出色的独立问题解决能力和创新思维,能够在高压环境中快速适应并推动项目进展;6、优秀的沟通和学习能力,能够与跨职能团队协作,共同解决技术难题。campus@espressif.com

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射频 IC 设计工程师(星光计划)星光计划2026年01月21日「星光计划」是乐鑫科技专为全球顶尖本硕博毕业生打造的招聘项目,长期开放且独立于乐鑫校园招聘,是一条通向技术前沿、快速成长的高速通道。岗位职责1、创新设计:负责开发下一代射频电路,包括但不限于 VCO、LNA、PA、Mixer 等模块,从概念设计到产品验证,你将亲身参与并引领技术创新;2、高效仿真:进行复杂射频电路的高精度仿真和优化,推动电路性能达到行业领先水平;3、跨团队合作:与应用工程师、产品工程师和测试工程师紧密协作,参与跨学科项目,确保产品顺利量产并满足严格的性能要求;4、技术指导:指导并与版图工程师合作,优化版图设计,确保产品质量和性能的一致性;5、技术前沿探索:撰写和维护高质量的设计文档,进行前沿技术研究,推动公司技术能力不断提升。任职要求1、顶尖高校毕业生,微电子/电子信息/通信工程等相关专业;2、掌握微波通信技术与射频电路理论知识,具备卓越的分析和解决问题能力;3、拥有一种或多种射频电路设计经验(如 VCO、LNA、PA、Mixer 等),具备创新思维和独立开发能力;4、熟悉 IC 设计和后端 Layout 设计流程,能够从设计到实现进行全面把控;5、优秀的沟通和学习能力,能够在高压环境中高效工作,乐于接受挑战并与团队紧密合作。campus@espressif.com

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数字 IC 设计工程师(星光计划)星光计划2026年01月21日「星光计划」是乐鑫科技专为全球顶尖本硕博毕业生打造的招聘项目,长期开放且独立于乐鑫校园招聘,是一条通向技术前沿、快速成长的高速通道。岗位职责1、负责 IP/SOC/低功耗等相关开发工作;2、根据设计需求,确定设计方案,并负责 RTL 实现;3、协助 EDA 仿真验证,部分参与 FPGA 验证;4、模块级时序约束、综合、STA 检查等相关工作;5、撰写文档,协助软件验证人员解决设计问题。任职要求1、顶尖高校毕业生,微电子/电子信息/通信工程等相关专业;2、具备钻研能力,对数字设计有浓厚的兴趣和热爱;3、具有较强的学习能力和解决问题的能力,能够快速适应新技术和工具;4、掌握数字电路设计的基础知识,了解 Verilog 或 VHDL 语言。campus@espressif.com

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嵌入式软件开发工程师(星光计划)星光计划2026年01月21日「星光计划」是乐鑫科技专为全球顶尖本硕博毕业生打造的招聘项目,长期开放且独立于乐鑫校园招聘,是一条通向技术前沿、快速成长的高速通道。岗位职责1、设计开发并优化无线协议栈,如 Wi-Fi/蓝牙/802.15.4 及其共存机制;2、参与乐鑫 AIoT 芯片模块设计,开发软件框架与接口,验证芯片功能;3、基于 Wi-Fi/蓝牙 SoC 和 SDK,实现 IoT 终端产品技术方案;4、维护并优化已有 SoC 外设驱动功能,设计开发新外设驱动;5、探索最新前沿技术,及时总结并分享各类技术问题。任职要求1、顶尖高校毕业生,计算机/电子信息/通信工程/自动化等相关专业;2、精通 C 语言,具有良好的编程习惯,熟悉一种或多种脚本语言,Python 优先;3、深入了解嵌入式相关技术,如操作系统、网络协议、自动化工具等;4、熟悉 Wi-Fi、蓝牙、15.4(Zigbee/Thread)、UWB、Lora、NB-IoT 等网络规范;5、熟悉常用通信外设的硬件协议,如 SPI、I2S、I2C、UART 等;6、对单片机与协议栈开发有浓厚兴趣,有 ESP8266/ESP32 开发经验者优先。campus@espressif.com

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项目管理培训生(星光计划)星光计划2026年01月21日「星光计划」是乐鑫科技专为全球顶尖本硕博毕业生打造的招聘项目,长期开放且独立于乐鑫校园招聘,是一条通向技术前沿、快速成长的高速通道。岗位职责乐鑫的项目管理培训生将作为多元且充满活力的国际化团队的一员,密切参与包括芯片设计、AIoT 方案的开发和交付等激动人心的项目工作。第一阶段:项目协调1、在项目实施过程中与项目经理紧密合作,协助需求规划,评估、开发并实施技术方案;2、支持关键项目计划制定,推动项目实施过程,并协调团队内部和跨团队资源;3、定期跟进项目进度,识别潜在风险,并向项目经理报告进展情况。第二阶段:项目经理1、独立负责研发或客户相关的项目;2、制定项目整体计划与跟踪项,为工程师提供定期指导,以确保项目成功;3、评估项目风险,并基于风险评估制定应急计划,控制项目质量,并确保项目按计划完成。第三阶段:高级项目经理1、管理大型、跨部门的复杂项目,与全球业务战略保持一致;2、基于对技术和市场的深刻理解,积极探索合作机会并定义业务战略,推动项目落地。任职要求1、顶尖高校毕业生,计算机/电子信息/通信工程/自动化等相关专业;2、熟悉一种或多种良好的脚本语言,如 C/C++/Python/Matlab 等;3、能够创造性、主动性地分析并解决问题,在压力下高效地工作;4、优秀的中英文书面和口头沟通表达能力,能够流利使用一门或多门其他语言优先。campus@espressif.com

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Technical Project Manager社会招聘2026年01月05日
Job Summary
Espressif Systems is seeking a highly skilled and experienced Technical Project Manager to join our dynamic team. The successful candidate will be responsible for managing complex technical projects, ensuring timely delivery, and aligning project outcomes with the company's strategic goals. This role requires a deep understanding of project management methodologies, technical expertise, and excellent communication skills.
Key Responsibilities
- Strategic Collaboration: Demonstrate a high level of strategic foresight and technical proficiency to collaborate effectively with various departments.
- Complex Program Management: Manage a variety of complex, cross-functional programs and lead all aspects of assigned program deliveries, such as chip tape-out, SDK release, and solution delivery.
- Roadmap Creation: Create and maintain the roadmap for the teams you work closely with, alongside respective Tech and Product leaders.
- Process Improvement: Define and drive the processes for managing these programs, constantly seeking ways to improve through automation and data-driven methods. Own the collaboration process and tools.
- Cultural Promotion: Embrace and promote Espressif’s culture and principles, fostering an environment that embodies Espressif’s values.
- General Project Management:
- Prepare project schedules and define milestones.
- Track and report progress, identify and mitigate risks, and remove blockers.
Required Qualifications
- Education: Bachelor’s degree or above in Microelectronics, Computer Science, Electrical and Electronic Engineering, Automation, or other related disciplines.
- Experience: Minimum of 5 years of project management experience driving complex, cross-functional technical projects.
- Technical Background: Experience as an R&D engineer in IC design or as a software developer is a plus.
- Agile Understanding: An understanding of Agile methodologies is desirable but not essential. More important is a ‘can do’ attitude and willingness to go beyond the job description.
- Work Environment: Experience working in a dynamic, fast-moving environment where self-motivation, autonomy, and self-decision making are essential to some extent.
- Communication Skills: Excellent written and verbal communication and presentation skills in both English and Mandarin.
Preferred Qualifications
- Experience with Agile/Scrum methodologies.
- Familiarity with Semiconductor industry or AIoT (Artificial Intelligence of Things) solutions and applications.
- Experience in managing international projects and distributed teams.
recruit@espressif.com

