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Job Title | classification | Job Type | Location | Posted | Apply | Job Number | Key Responsibilities | ||
---|---|---|---|---|---|---|---|---|---|
Digital IC Verification Engineer |
Corporate | Aug 28, 2024 |
7875 |
010 |
Position Responsibilities 1. Develop verification plans based on design-related documentation, set up the verification environment, and complete verification from module level to system level. 2. Execute regression testing and enhance verification coverage. 3. Collaborate with chip design engineers to identify and resolve design defects. 4. Guide the design team in implementing a verification-friendly design flow. 5. Perform RTL-level, gate-level, and low-power verification with UPF (Unified Power Format). 6. Assist FPGA engineers and software engineers in completing FPGA prototype testing. 7. Ensure the integrity and correctness of chip designs from multiple dimensions.
Position Requirements 1. Bachelor’s degree or higher in Computer Science, Electrical Engineering, Communications Engineering, or related fields. 3+ years of work experience. 2. Experience in design or verification of peripheral modules, communication modules, or SoC systems. 3. Proficiency in Verilog and expertise in C/SystemVerilog. 4. Knowledge of one or more scripting languages such as Python, Ruby, Perl, Shell, Tcl, or Makefile. 5. Experience with UVM (Universal Verification Methodology) is a plus. 6. Familiarity with the digital chip development process and successful tape-out project experience is an advantage. 7. Experience with formal verification is a plus. |
recruit.sgpr@espressif.com | |||
RF Design Engineer |
Corporate | Aug 21, 2024 |
4869 |
703 |
Responsibilities: 1. Help define chip and block level specifications. 2. Architect, develop and validate RF transmitter and receiver circuits. 3. Detailed design of sub-circuits including but not limited to low noise amplifier, power amplifiers, power detector, mixers, signal generation, PLL, signal detection, multiplexers. 4. Work closely with layout team and give support as needed. 5. Interface with test, product and application engineers to support the transition from prototype designs into mass production. 6. Author relevant technical documents and publications that describe the new circuit architectures and designs. Job Prerequisites: 1. Master or PhD in Electrical Engineering (or equivalent). 2. 5+ years of design experience in RF transmitter or receiver circuits. 3. Master of at least one programming language, such as Python, MATLAB and C. 4. Proficiency in using RF design tools. |
recruit.sgpr@espressif.com | |||
Analog Design Engineer |
Corporate | Aug 19, 2024 |
1245 |
01 |
Espressif Systems is a global leader in innovative wireless SoC and IoT solutions, with a strong focus on designing and developing cutting-edge products. Our mission is to empower a smart and connected world through continuous innovation and unparalleled customer support. We are seeking a highly motivated, skilled, and passionate Analog IC Designer to join our team. The successful candidate will possess a genuine interest in analog design, a strong ability to learn independently, and be hands-on in their approach to design work. Key Responsibilities 1. Develop and optimize analog circuits for various applications, including but not limited to power management, buck converters, bandgap references, crystal oscillators, phase lock loops, power amplifiers, low noise amplifiers, signal conditioning, and data converters. 2. Independently learn and stay updated on the latest trends and best practices in analog design. 3. Perform hands-on design and layout of critical circuits, ensuring high performance and reliability. 4. Create accurate and efficient models of analog components and systems for simulation purposes. 5. Derive transfer functions of circuits to analyze and predict system performance. 6. Collaborate effectively with cross-functional teams, including digital designers, firmware engineers, and system architects to meet tight project schedules. 7. Maintain a careful and meticulous approach to design work, ensuring thorough documentation, testing, and validation of designs. Qualifications 1. Bachelor's or Master's degree in Electrical Engineering or a related field. 2. years of experience in analog design, preferably in the semiconductor or wireless communication industry. 3. Demonstrated expertise in analog circuit design, simulation, and layout tools, such as Cadence Virtuoso, MMSIM, SpectreRF, AMS, QRC, Calibre, or similar. 4. Strong knowledge of analog design principles, circuit analysis, amplifier compensation, component matching, device reliability, ESD design, etc. 5. Proficient in building and validating models for analog components and systems. 6. Familiarity with deriving and analyzing transfer functions of circuits to predict system performance. 7. Excellent teamwork and communication skills, with a proven ability to work effectively in a fast-paced, collaborative environment. 8. Strong attention to detail, with a meticulous and methodical approach to design work and problem-solving. 9. Ability to work well under pressure, meet tight deadlines, and adapt to changing priorities. |
recruit.sgpr@espressif.com | |||
Physical Design Engineer |
Corporate | Aug 19, 2024 |
1255 |
10 |
Responsibilities 1. Be responsible for floor-plan layout, power network design, and CTS. 2. IR Drop analysis, DRC / LVS, RC extraction, etc. 3. Timing closure. 4. Area optimization. Qualifications 1. Bachelor’s degree, or above, in Microelectronics/Electronic Engineering/ Communications Engineering, or other related disciplines. 2. 3+ years of work experience. 3. Experience in PCB layout and tracing, using 40 nm techniques. 4. Ability to complete the whole P&R process and DRC, LVS, IR_Drop, STA, Low Power checks. 5. Familiarity with Tcl/Perl scripts and Verilog. 6. Familiarity with software tools for Design Flows and EDA delivered by Synopsys/Cadence. 7. Familiarity with Sign-off methodology and the EDA tools for STA/Power. |
recruit.sgpr@espressif.com | |||
ASIC Design Lead |
Corporate | Aug 19, 2024 |
4871 |
706 |
Espressif is seeking a talented ASIC Design Lead to join our newly set-up SoC team in Singapore. The building blocks in the SoCs we develop include DSP functions, CPU subsystems, and packet processing engines. This role focuses on the following: 1. Responsible for the architecture, design, integration, and verification of wireless communications SoCs. 2. Assist with the development of company documentation and generation of patents. 3. Involved in recruitment of talents to grow the team. 4. Mentor and develop the team to meet company’s strategic goals. Job Prerequisites: 1. Master’s degree in Electrical Engineering (or equivalent), with 8+ years’ industry experience. 2. Hands-on experience in RTL and verification, in-depth knowledge of mixed-signal SoC development cycle and best industry practices, from specification through tape-out and validation. 3. In-depth knowledge of SoC, embedded CPU and bus architectures, networking and control interfaces. 4. Proficiency in Verilog for RTL design and verification. 5. Confident user of C language and at least one scripting language (Python, tcl, Perl). |
recruit.sgpr@espressif.com | |||
Digital Verification Engineer / Lead |
Corporate | Jul 20, 2020 |
4702 |
504 |
Basic Qualification: 1. M. Tech / B. Tech in the field of VLSI/Electronics engineering. 2. Proficiency in UVM/SV and C/C++ based functional verification. 3. Experience in UPF based low power design verification. 4. Automation skills in PERL and/or TCL and/or Shell. 5. Team player, with good problem solving and communication skills. Job Description: 1. Drive functional verification at IP/SoC level using UVM/SV test bench. 2. Work closely with design team to define comprehensive feature test plans. 3. Perform functional and code coverage for logic verification sign-off. 4. Must have worked on ARM/RISC-V CPU based designs. 5. Must have performed gate level sim at SoC level. 6. Pre and Post-silicon debug/verification experience will be a plus. Interpersonal Skills: 1. Energetic, self-motivated 2. Pro-active, oriented on execution 3. Attentive to details and quality 4. Team player 5. Good communications and reporting skills |
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Digital Design Engineer / Lead |
Corporate | Jul 20, 2020 |
4701 |
503 |
Basic Qualications: 1. M.Tech/B. Tech in the field of VLSI/Electronics engineering. 2. Proficiency in System Verilog for RTL logic design and verification. 3. Experience in UPF based low power design flow. 4. EDA tool knowledge of Design Compiler, PrimeTime is preferred. 5. Automation skills in PERL and/or TCL and/or Shell is an added plus. 6. Team player,with good problem solving and communication skills. Job Description: 1. Digital IP design and SoC integration. 2. Perform Lint/CDC/LEC/Low-Power analysis at IP/SoC level. 3. Module level synthesis and timing constraints. 4. Must have worked on ARM/RISC-V CPU based designs. 5. Familiarity with FPGA/Silicon validation using C based tests and usage of standard debugging tools. 6. Familiarity with design of digital MAC/baseband/high-speed interface/CPU or DSP is a plus. Interpersonal Skills: 1. Energetic, self-motivated 2. Pro-active, oriented on execution 3. Attentive to details and quality 4. Team player 5. Good communications and reporting skills |