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  • Senior ASIC Design Engineer
    Experienced
    IC Design
    2026.06.08

    We are looking for a talented Senior ASIC Design Engineer to join our growing team in Singapore. In this role, you will be involved to develop the next-generation AI chips based on a revolutionary architecture. You will work closely with verification, front-end, and software teams to deliver high-quality digital IC solutions.

    Key Responsibilities:

    - Micro-architecture & RTL development for AI compute subsystems.

    - Analyze performance, power, and area (PPA) to deliver high-performance compute within strict cost and energy budgets.

    - Contribute to RTL design of SoC modules and assist in IP core integration.

    - Support chip-level system design tasks, including clock/reset architecture, low-power design techniques, and bus architecture.

    - Collaborate with verification and testing teams to perform module-level and system-level validation.

    - Assist front-end engineers in netlist delivery and help resolve timing issues.

    - Provide support for driver development, debugging, and technical documentation.

    Requirements:

    - Bachelor’s degree or higher in Electrical Engineering (or equivalent).

    - 5 years or above of relevant experience in digital IC/ASIC design.

    - Strong understanding of digital circuit fundamentals and proficiency in Verilog HDL.

    - Familiarity with ASIC design flow and EDA tools (e.g., Synopsys, Cadence).

    - Good understanding of CPU and Cache architectures, instruction set architectures (ISA), and compiler principles.

    - Knowledge of bus systems, DMA, and peripheral interface design.

    - Awareness of low-power design methodologies.

    Preferred Qualifications:

    - Familiarity with standard bus protocols (e.g., AMBA, AXI, AHB, APB).

    - Exposure to synthesis, timing analysis, or DFT concepts.

    - Good problem-solving skills and eagerness to learn in a collaborative environment.

    - Strong communication skills and ability to document technical work clearly.

    Apply Now
    recruit.sgpr@espressif.com
  • Senior Design Verification Engineer
    Experienced
    IC Design
    2026.03.24

    We are looking for a Senior Design Verification Engineer to work on Espressif's next-generation wireless and AI-capable SoCs. You will work closely with RTL designers and chip architects, and provide technical leadership within a small verification sub-team.

    Job Responsibilities

    1. Define verification plans and test cases based on design specifications, and own the verification environment end-to-end

    2. Collaborate with design engineers to identify and resolve design defects, and continuously drive verification coverage improvement

    3. Maintain simulation/verification environments using industry-standard EDA tools

    4. Write scripts to automate testing workflows in Python, Perl, TCL, or Shell

    5. Track and report code/functional coverage metrics; identify and close gaps before tapeout

    6. Debug failures and root-cause issues, working closely with designers to resolve issues

    7. Leverage AI tools to optimize verification flows and improve team-wide efficiency

    8. Mentor junior verification engineers and provide technical guidance across the team

     

    Job Requirements

    1. Bachelor's degree or above in Electronic Engineering, Computer Engineering, Computer Science, or a related field

    2. Preferably 3+ years of ASIC/SoC/IP design verification experience

    3. Proficiency in Verilog, SystemVerilog, UVM, and C

    4. Proficiency in scripting languages such as Python, Perl, Shell, or TCL

    5. Strong interest in exploring and adopting AI tools to improve day-to-day engineering productivity and verification efficiency

    Apply Now
    recruit.sgpr@espressif.com
  • Principal SoC Design Engineer
    Experienced
    IC Design
    2026.03.20

    We are looking for a Principal SoC Design Engineer to lead the architecture and design of Espressif's next-generation SoCs. You will drive chip-level design decisions, own critical digital design blocks, and provide technical leadership across the SoC design team.

    Job Responsibilities

    1. Define and own micro-architecture specifications for complex digital IP blocks and full SoC designs

    2. Lead RTL design and implementation using Verilog and SystemVerilog, ensuring quality, reusability, and design closure

    3. Drive SoC integration — including IP assembly, interconnect architecture, clock and reset strategy, and power domain planning

    4. Champion AI adoption across digital design team — evaluating and integrating AI tools, establishing best practices, and driving team-wide productivity improvements through emerging AI workflows

    5. Collaborate with verification, physical design, and firmware teams to ensure design intent is correctly implemented and validated

    6. Lead design reviews and provide technical direction to senior and junior design engineers

    7. Define and enforce design guidelines, coding standards, and reuse methodologies across the team

    Job Requirements

    1. Bachelor's degree or above in Electrical Engineering, Electronics, Computer Engineering, Computer Science, or a related field

    2. Preferably 8+ years of ASIC/SoC digital design experience

    3. Proven ability to lead and mentor a team of design engineers

    4. Deep proficiency in RTL design using Verilog and SystemVerilog

    5. Strong understanding of SoC architecture — interconnects, memory subsystems, clock and power domains

    6. Proficiency in scripting languages such as Python, Perl, Shell, or TCL

    7. Strong interest in exploring and adopting AI tools to improve design productivity and engineering efficiency

    Apply Now
    recruit.sgpr@espressif.com
  • ISP Algorithm Engineer
    Experienced
    IC Design
    2026.02.27
    Job Responsibilities
    1. Responsible for ISP algorithm code development, including development and optimization of algorithms such as 3A, noise reduction, and HDR.
    2. Develop ISP algorithms and drivers, and create ISP debugging tools.
    3. Participate in ISP design and performance optimization for various application scenarios.
    4. Provide post-launch technical support for relevant algorithms in products.
    5. Responsible for establishing image quality evaluation metrics and testing standards.

    Job Requirements

    1. Bachelor's degree or above in Computer Science, Electronic Engineering, Image Processing, or related fields.
    2. Solid foundation in digital image processing theory, with 3+ years of ISP algorithm development experience.
    3. Familiar with Linux Camera architecture, including V4L2 and Media Controller.
    4. Proficient in the full Camera ISP algorithm workflow, with experience in ISP pipeline and 3A algorithm porting and development; extensive image signal processing experience.
    5. Familiar with RAW image analysis tools such as Imatest, with the ability to accurately assess image data quality.
    6. Strong programming skills with proficiency in C/C++ or Matlab.
    Apply Now
    recruit.sgpr@espressif.com
  • Digital IC Verification Engineer
    Experienced
    IC Design
    2026.03.09
    Espressif is looking for a motivated Digital IC Verification Engineer to join our growing and dynamic team.  In this role, you will contribute to developing RTL verification platforms for block, subsystem, and system levels, helping ensure that our IC designs meet high-quality standards.

    Job Responsibilities

    1. Define verification plans and test cases based on chip design specifications, and establish the verification environment
    2. Collaborate with chip design engineers in identifying and fixing design defects and continuously improve verification coverage
    3. Participate in gate-level simulation and formal verification
    4. Optimize tools and the verification environment to enhance verification efficiency

    Job Requirements

    1. Bachelor's degree or above in Electronic Engineering, Computer Engineering, Computer Science, or related fields
    2. Familiar with Verilog, C, System Verilog, UVM
    3. Familiar with scripting languages such as Python,Perl, Shell, and or Tcl
    4. Fluency in AI tools will be a plus
    Apply Now
    recruit.sgpr@espressif.com
  • Analog Design Engineer
    Experienced
    IC Design
    2025.08.18

    Espressif Systems is a global leader in innovative wireless SoC and IoT solutions, with a strong focus on designing and developing cutting-edge products. Our mission is to empower a smart and connected world through continuous innovation and unparalleled customer support.

    We are seeking a highly motivated, skilled, and passionate Analog IC Designer to join our team. The successful candidate will possess a genuine interest in analog design, a strong ability to learn independently, and be hands-on in their approach to design work.

    Key Responsibilities

    1. Develop and optimize analog circuits for various applications, including but not limited to power management, buck converters, bandgap references, crystal oscillators, phase lock loops, power amplifiers, low noise amplifiers, signal conditioning, and data converters.

    2. Independently learn and stay updated on the latest trends and best practices in analog design.

    3. Perform hands-on design and layout of critical circuits, ensuring high performance and reliability.

    4. Create accurate and efficient models of analog components and systems for simulation purposes.

    5. Derive transfer functions of circuits to analyze and predict system performance.

    6. Collaborate effectively with cross-functional teams, including digital designers, firmware engineers, and system architects to meet tight project schedules.

    7. Maintain a careful and meticulous approach to design work, ensuring thorough documentation, testing, and validation of designs.

    Qualifications

    1. Bachelor's or Master's degree in Electrical Engineering or a related field.

    2. years of experience in analog design, preferably in the semiconductor or wireless communication industry.

    3. Demonstrated expertise in analog circuit design, simulation, and layout tools, such as Cadence Virtuoso, MMSIM, SpectreRF, AMS, QRC, Calibre, or similar.

    4. Strong knowledge of analog design principles, circuit analysis, amplifier compensation, component matching, device reliability, ESD design, etc.

    5. Proficient in building and validating models for analog components and systems.

    6. Familiarity with deriving and analyzing transfer functions of circuits to predict system performance.

    7. Excellent teamwork and communication skills, with a proven ability to work effectively in a fast-paced, collaborative environment.

    8. Strong attention to detail, with a meticulous and methodical approach to design work and problem-solving.

    9. Ability to work well under pressure, meet tight deadlines, and adapt to changing priorities.

    Apply Now
    recruit.sgpr@espressif.com
  • Digital Design Engineer / Lead
    Experienced
    IC Design
    2020.07.20

    Basic Qualications:

    1. M.Tech/B. Tech in the field of VLSI/Electronics engineering.

    2. Proficiency in System Verilog for RTL logic design and verification.

    3. Experience in UPF based low power design flow.

    4. EDA tool knowledge of Design Compiler, PrimeTime is preferred.

    5. Automation skills in PERL and/or TCL and/or Shell is an added plus.

    6. Team player,with good problem solving and communication skills.

    Job Description:

    1. Digital IP design and SoC integration.

    2. Perform Lint/CDC/LEC/Low-Power analysis at IP/SoC level.

    3. Module level synthesis and timing constraints.

    4. Must have worked on ARM/RISC-V CPU based designs.

    5. Familiarity with FPGA/Silicon validation using C based tests and usage of standard debugging tools.

    6. Familiarity with design of digital MAC/baseband/high-speed interface/CPU or DSP is a plus.

    Interpersonal Skills:

    1. Energetic, self-motivated

    2. Pro-active, oriented on execution

    3. Attentive to details and quality

    4. Team player

    5. Good communications and reporting skills 

    Apply Now
  • Digital Verification Engineer / Lead
    Experienced
    IC Design
    2020.07.20

    Basic Qualification:

    1. M. Tech / B. Tech in the field of VLSI/Electronics engineering.

    2. Proficiency in UVM/SV and C/C++ based functional verification.

    3. Experience in UPF based low power design verification.

    4. Automation skills in PERL and/or TCL and/or Shell.

    5. Team player, with good problem solving and communication skills.

    Job Description:

    1. Drive functional verification at IP/SoC level using UVM/SV test bench.

    2. Work closely with design team to define comprehensive feature test plans.

    3. Perform functional and code coverage for logic verification sign-off.

    4. Must have worked on ARM/RISC-V CPU based designs.

    5. Must have performed gate level sim at SoC level.

    6. Pre and Post-silicon debug/verification experience will be a plus.

    Interpersonal Skills:

    1. Energetic, self-motivated

    2. Pro-active, oriented on execution

    3. Attentive to details and quality

    4. Team player

    5. Good communications and reporting skills

    Apply Now